CSCI 203 - Introduction to Hardware Description Language Programming

Credit(s): 4

Prerequisite(s): CSCI 111, CSCI 113, and CSCI 127.
This course covers programing of Field Programmable Gate Arrays (FPGAs) using a Hardware Description Language such as VHDL (Very High Speed Integrated Circuit Hardware Description Language) to describe combinational and synchronous sequential logic circuits. Functional verification of designs is accomplished using a logic simulator. Students will get hands-on experience implementing digital systems on FPGAs. (Spring Semester)

Course Learning Outcomes: Upon completion of the course, students will be able to

Describe a digital system using a Hardware Description Language (HDL).
Model basic combinational logic in a HDL, (VHDL, Verilog, or similar).
Model basic sequential logic in a HDL including state machines and counters.
Incorporate pre-existing logic cores into a HDL design.
Understand the HDL design flow including synthesis and place/route and its effect on timing.
Perform logic simulations on a HDL design.
Prototype digital systems on an FPGA.